| PART |
Description |
Maker |
| NC7WV0706 NC7WV07P6XNL |
TinyLogic ULP-A Dual Buffer (Open Drain Output) AUP/ULP/V SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6
|
Fairchild Semiconductor, Corp.
|
| NC7WP125L8X NC7WP125 NC7WP125K8X |
TinyLogic ULP Buffer with 3-STATE Output
|
FAIRCHILD[Fairchild Semiconductor]
|
| NC7SV125_04 NC7SV125 NC7SV125L6X NC7SV125P5X NC7SV |
TinyLogic ULP-A Buffer with 3-STATE Output
|
FAIRCHILD[Fairchild Semiconductor]
|
| NC7WV07L6X12 NC7WV07P6X12 NC7WV0712 |
TinyLogic? ULP-A Bual Buffer (Open-Drain Output)
|
Fairchild Semiconductor
|
| NC7SP17_05 NC7SP17 NC7SP17L6X NC7SP17P5X |
TinyLogic ULP Single Buffer with Schmitt Trigger Input
|
FAIRCHILD[Fairchild Semiconductor]
|
| NC7SV17L6X10 |
TinyLogic? ULP-A Single Buffer with Schmitt Trigger Input
|
Fairchild Semiconductor
|
| NC7WP07 NC7WP07L6X NC7WP07P6X FAIRCHILDSEMICONDUCT |
TinyLogic-R ULP Dual Buffer (Open Drain Output) (Preliminary)
TinyLogic ULP Dual Buffer (Open Drain Output) (Preliminary)
|
Fairchild Semiconductor
|
| NC7SP157L6X NC7SP157P6X NC7SP157 |
TinyLogic ULP 2-Input Non-Inverting Multiplexer P SERIES, 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, DSO6
TinyLogic ULP 2-Input Non-Inverting Multiplexer
TINYLOGIC ULP 2-INPUT NON-INVERTING MULTIPLEXER
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| NC7WP14P6X NC7WP14 NC7WP14L6X |
TinyLogic ULP Inverter with Schmitt Trigger Inputs
TinyLogic ULP Dual Inverter with Schmitt Trigger Inputs
RECTIFIER BRIDGE 1.5A 50V 50A-ifsm 1.1V-vf 10uA-ir DFS 50/TUBE P SERIES, DUAL 1-INPUT INVERT GATE, PDSO6
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor, Corp.
|
| NC7SV32P5X NC7SV32L6X NC7SV32 |
TinyLogic ULP-A 2-Input OR Gate
TinyLogic ULP-A 2-Input OR Gate
|
FAIRCHILD[Fairchild Semiconductor]
|
| NC7SV04P5X NC7SV04 NC7SV04L6X |
TinyLogic ULP-A Inverter
TinyLogic ULP-A Inverter
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
|
